FAN7391 Datasheet, PDF (12/13 Pages) Fairchild Semiconductor – High-Current, High & Low-Side, Gate-Drive IC

Package Dimensions
8.75
8.50
A
7.62
14
8
B
6.00
4.00
3.80
0.65
5.60
PIN ONE
INDICATOR
1
1.27
(0.33)
7
0.51
0.35
1.70
1.27
LAND PATTERN RECOMMENDATION
0.25 M C B A
1.75 MAX
1.50
1.25
R0.10
R0.10
8°
0°
0.90
0.50
(1.04)
SEE DETAIL A
0.25
0.10 ^C
0.10 C
0.25
0.19
NOTES: UNLESS OTHERWISE SPECIFIED
0.50
0.25
A) THIS PACKAGE CONFORMS TO JEDEC
X 45°
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
GAGE PLANE _{FLASH OR BURRS.}
D) LANDPATTERN STANDARD:
0.36
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
SEATING PLANE
DETAIL A
SCALE: 20:1
Figure 32. 14-Lead, Small Outline Package (SOP)
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/M1/M14A.pdf
Always visit Fairchild Semiconductor’s online packaging area for the most recent packing drawings:
http://www.fairchildsemi.com/packing_dwg/PKG-M14A.pdf.
© 2014 Fairchild Semiconductor Corporation
FAN7391 Rev. 1.0.0
12
www.fairchildsemi.com