FSFM260N Datasheet, PDF (10/18 Pages) Fairchild Semiconductor – Green-Mode Fairchild Power Switch (FPS™)

Functional Description
1. Startup: In previous generations of Fairchild Power
Switches (FPS™), the V_CC pin had an external startup
resistor to the DC input voltage line. In this generation,
the startup resistor is replaced by an internal high-
voltage current source. At startup, an internal high-
voltage current source supplies the internal bias and
charges the external capacitor (C_vcc) connected to the
V_CC pin, as illustrated in Figure 16. When V_CC reaches
12V, the FSFM260/261/300 begins switching and the
internal high-voltage current source is disabled. Then,
the FSFM260/261/300 continues its normal switching
operation and the power is supplied from the auxiliary
transformer winding unless V_CC goes below the stop
voltage of 8V.
V_DC
C_Vcc
V_CC
2
Vstr
5
8V/12V
V_CC good
I_start
Vref
Internal
Bias
FSFM260 Rev: 00
Figure 16. Internal Startup Circuit
2. Feedback Control: FSFM260/261/300 employs
current-mode control, as shown in Figure 17. An opto-
coupler (such as the FOD817A) and shunt regulator
(such as the KA431) are typically used to implement the
feedback network. Comparing the feedback voltage with
the voltage across the R_SENSE resistor makes it possible
to control the switching duty cycle. When the reference
pin voltage of the shunt regulator exceeds the internal
reference voltage of 2.5V, the opto coupler LED current
increases, pulling down the feedback voltage and
reducing the duty cycle. This typically occurs when the
input voltage is increased or the output load is
decreased.
2.1 Pulse-by-Pulse Current Limit: Because current-
mode control is employed, the peak current through the
SenseFET is determined by the inverting input of the
PWM comparator (V_FB*), as shown in Figure 17. When
the current through the opto-transistor is zero and the
current limit pin (#4) is left floating, the feedback current
source (I_FB) of 0.9mA flows only through the internal
resistor (R+2.5R=2.8k). In this case, the cathode voltage
of diode D2 and the peak drain current have maximum
values of 2.5V and 1.5A, respectively. The pulse-by-
pulse current limit can be adjusted using a resistor to
GND on the current limit pin (#4). The current limit level
using an external resistor (R_LIM) is given by:
I_LIM=
R_LIM⋅ I_{LIM_SPEC}
2.8kΩ+R_LIM
(1)
=>
R_LIM
=
I_LIM ⋅2.8kΩ
I_{LIM_SPEC} − I_LIM
(2)
where, I_LIM is the desired drain current limit.
VCC VCC
Idelay
IFB
VO
Vfb
3
OSC
FOD817A
D1 D2
CB
2.5R
KA431
+
Vfb* _R
-
SenseFET
Gate
driver
FSFM260 Rev: 00
VSD
OLP
Rsense
Figure 17. Pulse Width Modulation (PWM) Circuit
2.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
occurs through the SenseFET, caused by primary-side
capacitance and secondary-side rectifier reverse
recovery. Excessive voltage across the R_SENSE resistor
would lead to incorrect feedback operation in the current-
mode PWM control. To counter this effect, the FSFM260/
261/300 employs a leading edge blanking (LEB) circuit.
This circuit inhibits the PWM comparator for a short time
(t_LEB) after the SenseFET is turned on.
2.3 Constant Power Limit Circuit: Due to the circuit
delay of FPS, the pulse-by-pulse limit current increases
a little bit when the input voltage increases. This means
unwanted excessive power is delivered to the secondary
side. To compensate, the auxiliary power compensation
network in Figure 18 can be used. R_LIM can adjust pulse-
by-pulse current by absorbing internal current source
(I_FB: typical value is 0.9mA) depending on the ratio
between resistors. With the suggested compensation
circuit, additional current from I_FB is absorbed more
proportionally to the input voltage (V_DC) and achieves
constant power in wide input range. Choose R_LIM for
proper current to the application, then check the pulse-
by-pulse current difference between minimum and
maximum input voltage. To eliminate the difference (to
gain constant power), R_y can be calculated by:
R_y
≅
I_{lim_spec}
×V_dc
×
N_a
N_p
I_fb × ΔI_{lim_comp}
(3)
© 2009 Fairchild Semiconductor Corporation
FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1
10
www.fairchildsemi.com