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FSCM0465R Datasheet, PDF (10/20 Pages) Fairchild Semiconductor – Green Mode Fairchild Power Switch
Functional Description
1. Startup: Figure 16 shows the typical startup circuit
and transformer auxiliary winding for the FSCM0465R
application. Before the FSCM0465R begins switching, it
consumes only startup current (typically 20µA) and the
current supplied from the DC link supply current
consumed by the FPS (ICC) and charges the external
capacitor (Ca) connected to the VCC pin. When VCC
reaches start voltage of 12V (VSTART), the FSCM0465R
begins switching and the current consumed by the
FSCM0465R increases to 2.5mA. Then the FSCM0465R
continues its normal switching operation and the power
required for this device is supplied from the transformer
auxiliary winding, unless VCC drops below the stop
voltage of 8V (VSTOP). To guarantee the stable operation
of the control IC, VCC has under-voltage lockout (UVLO)
with 4V hysteresis. Figure 17 shows the relationship
between the current consumed by the FPS (ICC) and the
supply voltage (VCC).
CDC
AC line
(Vlinemin - Vlinemax)
ISUP
Rstr
VCC
Da
FSCM0465R
ICC
Ca
FSCM0465R Rev. 00
Figure 16. Startup Circuit
ICC
The minimum current supplied through the startup
resistor is given by:
( ) Isupmin =
2 ⋅Vlinemin − Vstar t
⋅1
Rstr
(1)
where Vlinemin is the minimum input voltage, Vstart is the
start voltage (12V) and Rstr is the startup resistor. The
startup resistor should be chosen so that Isupmin is larger
than the maximum startup current (40µA). If not, VCC can
not be charged to the start voltage and FPS fails to start.
2. Feedback Control: The FSCM0465R employs
current mode control, as shown in Figure 18. An opto-
coupler (such as the H11A817A) and a shunt regulator
(such as the KA431) are typically used to implement the
feedback network. Comparing the feedback voltage with
the voltage across the Rsense resistor makes it possible
to control the switching duty cycle. When the reference
pin voltage of the KA431 exceeds the internal reference
voltage of 2.5V, the H11A817A LED current increases,
pulling down the feedback voltage and reducing the duty
cycle. This event typically happens when the input
voltage is increased or the output load is decreased.
2.1 Pulse-by-pulse Current Limit: Because current
mode control is employed, the peak current through the
SenseFET is determined by the inverting input of the
PWM comparator (Vfb*) as shown in Figure 18. When
the current through the opto-transistor is zero and the
current limit pin (#5) is left floating, the feedback current
source (IFB) of 0.9mA flows only through the internal
resistor (R+2.5R=2.8k). In this case, the cathode voltage
of diode D2 and the peak drain current have maximum
values of 2.5V and 2.5A, respectively. The pulse-by-
pulse current limit can be adjusted using a resistor to
GND on the current limit pin (#5). The current limit level
using an external resistor (RLIM) is given by:
ILIM = RLIM ⋅ 2.5A
(2)
2.8K Ω + RLIM
3mA
Power Down
Power Up
25μA
FSCM0465R Rev. 00 Vstop=8V
Vstart=12V
VCC
Vz
Figure 17. Relation Between Operating Supply
Current and VCC Voltage
Vcc Vref
Idelay
IFB 0.9mA
Vo
Vfb
4
OSC
H11A817A
D1 D2
CB
2.5R
0.3k
+
Vfb* R
KA431
6
-
SenseFET
Gate
driver
RLI M
FSCM0465R Rev. 00
VSD
OLP
Rsense
Figure 18. Pulse Width Modulation (PWM) Circuit
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
10
www.fairchildsemi.com