ZVN4210ASTZ Datasheet, PDF (1/2 Pages) Fairchild Semiconductor – N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – MARCH 94
FEATURES
* 100 Volt V_DS
* R_DS(on)= 1.5Ω
* Spice model available
ZVN4210A
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at T_amb=25°C
Pulsed Drain Current
Gate-Source Voltage
Power Dissipation at T_amb=25°C
Operating and Storage Temperature Range
SYMBOL
V_DS
I_D
I_DM
V_GS
P_tot
T_j:T_stg
D
G
S
E-Line
TO92 Compatible
VALUE
100
450
6
± 20
700
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at T_amb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BV_DSS 100
V
I_D=1mA, V_GS=0V
Gate-Source Threshold
Voltage
V_GS(th)
0.8
2.4
V
ID=1mA, V_DS= V_GS
Gate-Body Leakage
I_GSS
100 nA V_GS=± 20V, V_DS=0V
Zero Gate Voltage Drain
I_DSS
Current
10
µA V_DS=100V, V_GS=0
100 µA V_DS=80V, V_GS=0V, T=125°C(2)
On-State Drain Current(1)
I_D(on)
2.5
A
V_DS=25V, V_GS=10V
Static Drain-Source On-State R_DS(on)
Resistance (1)
1.5 Ω
1.8
V_GS=10V,I_D=1.5A
V_GS=5V,I_D=500mA
Forward Transconductance(1)(2g_fs
250
)
mS V_DS=25V,I_D=1.5A
Input Capacitance (2)
Common Source Output
Capacitance (2)
C_iss
C_oss
100 pF
40
pF V_DS=25V, V_GS=0V, f=1MHz
Reverse Transfer Capacitance C_rss
(2)
12 pF
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
t_d(on)
t_r
t_d(off)
t_f
4
ns
8
ns
V_DD ≈25V, I_D=1.5A
20 ns
30 ns
3-388