TMC2330A Datasheet, PDF (1/18 Pages) Fairchild Semiconductor – Coordinate Transformer 16 x 16 Bit, 40 MOPS

TMC2330A
Coordinate Transformer
16 x 16 Bit, 40 MOPS
www.fairchildsemi.com
Features
• Rectangular-to-Polar or Polar-to-Rectangular conversion
at guaranteed 40 MOPS pipelined throughput rate
• Polar data: 16-bit magnitude, 32-bit input/16-bit output
phase
• 16-bit user selectable two’s complement or sign-and-
magnitude rectangular data formats
• Input register clock enables and asynchronous output
enables simplify interfacing
• User-configurable phase accumulator for waveform
synthesis and amplitude, frequency, or phase modulation
• Magnitude output data overflow flag (in Polar-to-
Rectangular mode)
• Low power consumption CMOS process
• Single +5V power supply
• Available in a 120-pin plastic pin grid array package
(PPGA), 120-pin ceramic pin grid array package (CPGA),
120-pin MQFP to PPGA (MPGA) package, and 120-pin
metric quad flatpack package (MQFP)
Applications
• Scan conversion (phased array to raster)
• Vector magnitude estimation
• Range and bearing derivation
• Spectral analysis
• Digital waveform synthesis, including quadrature
functions
• Digital modulation and demodulation
Description
The TMC2330A VLSI circuit converts bidirectionally
between Cartesian (real and imaginary) and Polar (magnitude
and phase) coordinates at up to 40 MOPS (Million Operations
Per Second).
In its Rectangular-to-Polar mode, the TMC2330A can extract
phase and magnitude information or backward “map” from a
rectangular raster display to a radial (e.g., range-and-azimuth)
data set.
The Polar-to-Rectangular mode executes direct digital waveform
synthesis and modulation. The TMC2330A greatly simplifies
real-time image-space conversion between the radially-generated
image scan data found in radar, sonar, and medical imaging
systems, and raster display formats.
All input and output data ports are registered, and a new trans-
formed data word pair is available at the output every clock
cycle. The user-configurable phase accumulator structure,
input clock enables, and asynchronous three-state output bus
enables simplify interfacing. All signals are TTL compatible.
Fabricated in a submicron CMOS process, the TMC2330A
operates at up to the 40 MHz maximum clock rate over the full
commercial (0 to 70°C) temperature and supply voltage ranges,
and is available in 120-pin plastic pin grid array, 120-pin
ceramic pin grid array, 120-pin metric quad flatpack to PPGA
package, and 120-pin metric quad flatpack packages.
Logic Symbol
DATA
INPUTS
ENXR
16
XRIN15-0
ENYP1-0
32
YPIN31-0
2
ACC_1-0
CONFIGURATION TCXY
CONTROLS
RTP
CLK
TMC2330A
OERX
16
RXOUT15-0
OEPY
DATA
OUTPUTS
16
PYOUT15-0
OVF
REV. 1.1.8 10/31/00