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SSP7N60B Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – 600V N-Channel MOSFET
SSP7N60B/SSS7N60B
600V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies.
Features
• 7.0A, 600V, RDS(on) = 1.2Ω @VGS = 10 V
• Low gate charge ( typical 38 nC)
• Low Crss ( typical 23 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• TO-220F package isolation = 4.0kV (Note 6)
D
G DS
TO-220
SSP Series
GD S
TO-220F
SSS Series
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
Drain-Source Voltage
ID
Drain Current - Continuous (TC = 25°C)
- Continuous (TC = 100°C)
IDM
Drain Current - Pulsed
(Note 1)
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
EAR
Repetitive Avalanche Energy
(Note 1)
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
PD
Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
Operating and Storage Temperature Range
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature
SSP7N60B SSS7N60B
600
7.0
7.0 *
4.4
4.4 *
28
28 *
± 30
420
7.0
14.7
5.5
147
48
1.18
0.38
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case Max.
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient Max.
SSP7N60B
0.85
0.5
62.5
SSS7N60B
2.6
--
62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2002 Fairchild Semiconductor Corporation
Rev. B, June 2002