SSP45N20B Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – 200V N-Channel MOSFET

November 2001
SSP45N20B/SSS45N20B
200V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supply and motor control.
Features
• 35A, 200V, R_DS(on) = 0.065Ω @V_GS = 10 V
• Low gate charge ( typical 133 nC)
• Low Crss ( typical 120 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
G DS
TO-220
SSP Series
GD S
TO-220F
SSS Series
G
S
Absolute Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
Parameter
V_DSS
Drain-Source Voltage
I_D
Drain Current - Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
I_DM
Drain Current - Pulsed
(Note 1)
V_GSS
Gate-Source Voltage
E_AS
Single Pulsed Avalanche Energy
(Note 2)
I_AR
Avalanche Current
(Note 1)
E_AR
Repetitive Avalanche Energy
(Note 1)
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
P_D
Power Dissipation (T_C = 25°C)
- Derate above 25°C
T_J, T_STG
Operating and Storage Temperature Range
T_L
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature.
SSP45N20B SSS45N20B
200
35
35 *
22.2
22.2 *
140
140 *
± 30
650
35
17.6
5.5
176
57
1.41
0.45
-55 to +150
300
Thermal Characteristics
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction-to-Case Max.
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient Max.
SSP45N20B
0.71
0.5
62.5
SSS45N20B
2.2
--
62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001