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SPT7861 Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – 10-BIT, 40 MSPS, 160 mW A/D CONVERTER | |||
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SPT7861
FEATURES
⢠Monolithic 40 MSPS converter
⢠160 mW power dissipation
⢠On-chip track-and-hold
⢠Single +5 V power supply
⢠TTL/CMOS outputs
⢠5 pF input capacitance
⢠Low cost
⢠Tri-state output buffers
⢠High ESD protection: 3,500 V minimum
⢠Selectable +3 V or +5 V logic I/O
10-BIT, 40 MSPS, 160 mW A/D CONVERTER
TECHNICAL DATA
JUNE 25, 2001
APPLICATIONS
⢠All high-speed applications where low power
dissipation is required
⢠Video imaging
⢠Medical imaging
⢠Radar receivers
⢠IR imaging
⢠Digital communications
GENERAL DESCRIPTION
The SPT7861 is a 10-bit monolithic, low-cost, ultralow-
power analog-to-digital converter capable of minimum
word rates of 40 MSPS. This is a pin-compatible improved
version of the SPT7860. The on-chip track-and-hold func-
tion assures excellent dynamic performance without the
need for external components. The input drive require-
ments are minimized due to the SPT7861âs low input
capacitance of only 5 pF.
Power dissipation is extremely low at only 160 mW typical
at 40 MSPS with a power supply of +5.0 V. The digital out-
puts are +3 V or +5 V, and are user selectable. The
SPT7861 is pin-compatible with an entire family of 10-bit,
CMOS converters (SPT7835/40/50/55/60/61), which sim-
plifies upgrades. The SPT7861 has incorporated propri-
etary circuit design and CMOS processing technologies to
achieve its advanced performance. Inputs and outputs are
TTL/CMOS-compatible to interface with TTL/CMOS logic
systems. Output data format is straight binary.
The SPT7861 is available in 28-lead SOIC and 32-lead
small (7 mm square) TQFP packages over the commer-
cial temperature range.
BLOCK DIAGRAM
AIN
1:16
Mux
ADC Section 1
T/H
Auto-
Zero
CMP
CLK In
Enable
Data
Valid
P1
...P2
Timing
and P15
Control
P16
... ADC Section 2
ADC Section 15
ADC Section 16
T/H
Auto-
Zero
CMP
11-Bit
11
SAR
11
DAC
D10 Overrange
D9 (MSB)
D8
D7
...
... 11
11
11-Bit
16:1
D6
Mux/
D5
Error
Correction
11
D4
11-Bit
SAR
D3
11
DAC
D2
D1
Ref
In
Reference Ladder
VREF
D0 (LSB)
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