SPT7835 Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – 10-BIT, 5 MSPS, 75 mW A/D CONVERTER

FEATURES
• Monolithic 5 MSPS converter
• 75 mW power dissipation
• On-chip track-and-hold
• Single +5 V power supply
• TTL/CMOS outputs
• 5 pF input capacitance
• Low cost
• Tri-state output buffers
• High ESD protection: 3,500 V minimum
• Selectable +3 V or +5 V logic I/O
SPT7835
10-BIT, 5 MSPS, 75 mW A/D CONVERTER
TECHNICAL DATA
JUNE 27, 2001
APPLICATIONS
• All high-speed applications where low power
dissipation is required
• Video imaging
• Medical imaging
• IR imaging
• Scanners
• Digital communications
GENERAL DESCRIPTION
The SPT7835 is a 10-bit monolithic, low-cost, ultralow-
power analog-to-digital converter capable of minimum
word rates of 5 MSPS. The on-chip track-and-hold func-
tion assures very good dynamic performance without the
need for external components. The input drive require-
ments are minimized due to the SPT7835’s low input
capacitance of only 5 pF.
Power dissipation is extremely low at only 75 mW typical
at 5 MSPS with a power supply of +5.0 V. The digital out-
puts are +3 V or +5 V, and are user selectable. The
SPT7835 is pin-compatible with an entire family of 10-bit,
CMOS converters (SPT7835/40/50/55/60/61), which sim-
plifies upgrades. The SPT7835 has incorporated propri-
etary circuit design* and CMOS processing technologies
to achieve its advanced performance. Inputs and outputs
are TTL/CMOS-compatible to interface with TTL/CMOS
logic systems. Output data format is straight binary.
The SPT7835 is available in a 28-lead SOIC package over
the industrial temperature range, and a 32-lead small
(7 mm square) TQFP package over the commercial
temperature range.
*Patent pending
BLOCK DIAGRAM
ADC Section 1
A_IN
1:8
Mux
T/H
Auto-
Zero
CMP
CLK In
Enable
Data
Valid
P1
...^P2
Timing
and ^P7
Control
P8
... ^{ADC Section 2}
ADC Section 7
ADC Section 8
T/H
Auto-
Zero
CMP
11-Bit
11
SAR
11
DAC
D10 Overrange
D9 (MSB)
D8
D7
...
... 11
11
11-Bit
8:1
D6
Mux/
D5
Error
Correction
11
D4
11-Bit
SAR
D3
11
DAC
D2
D1
Ref
In
Reference Ladder
V_REF
D0 (LSB)