SG5842A_09 Datasheet, PDF (1/15 Pages) Fairchild Semiconductor – Highly Integrated Green-Mode PWM Controller

December 2009
SG5842A/SG5842JA — Highly Integrated Green-Mode
PWM Controller
Features
ƒ Green-Mode PWM Controller
ƒ Low Startup Current: 14µA
ƒ Low Operating Current: 4mA
ƒ Programmable PWM Frequency with Hopping
(SG5842JA)
ƒ Peak-Current-Mode Control
ƒ Cycle-by-Cycle Current Limiting
ƒ Synchronized Slope Compensation
ƒ Leading-Edge Blanking (LEB)
ƒ Constant Output Power Limit
ƒ Totem-Pole Output with Soft Driving
ƒ VDD Over-Voltage Protection (OVP)
ƒ Programmable Over-Temperature Protection (OTP)
ƒ Internal Latch Circuit (OTP, OVP)
ƒ Internal Open-Loop Protection
ƒ VDD Under-Voltage Lockout (UVLO)
ƒ GATE Output Maximum Voltage Clamp: 18V
Applications
General-purpose switch-mode power supplies and
flyback power converters, including:
ƒ Notebook Power Adapters
ƒ Open-Frame SMPS
Description
The highly integrated SG5842A/JA series of PWM
controllers provides several features to enhance the
performance of flyback converters. To minimize standby
power consumption, a proprietary green-mode function
provides off-time modulation to continuously decrease
the switching frequency at light-load conditions. To
avoid acoustic-noise problems, the minimum PWM
frequency set above 22KHz. This green-mode function
enables the power supply to meet international power
conservation requirements. To further reduce power
consumption, SG5842A/JA is manufactured using the
BiCMOS process. This allows a low startup current,
around 14µA, and an operating current of only 4mA. As
a result, a large startup resistance can be used.
The SG5842A/JA built-in synchronized slope
compensation achieves stable peak-current-mode
control. SG5842JA integrates a frequency-hopping
function that helps reduce EMI emission of a power
supply with minimum line filters.
SG5842A/JA provides many protection functions. In
addition to cycle-by-cycle current limiting, the internal
open-loop protection circuit ensures safety should an
open-loop or output short-circuit failure occur. PWM
output is disabled until VDD drops below the UVLO lower
limit, then the controller starts again. As long as VDD
exceeds about 24V, the internal OVP circuit is triggered.
An external NTC thermistor can be applied for over-
temperature protection.
SG5842A/JA is available in an 8-pin DIP or SOP
package.
© 2007 Fairchild Semiconductor Corporation
SG5842A/SG5842JA • Rev. 1.4.3
www.fairchildsemi.com