SCAN18374T Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – D Flip-Flop with TRI-STATE Outputs

October 1991
Revised May 2000
SCAN18374T
D-Type Flip-Flop with 3-STATE Outputs
General Description
The SCAN18374T is a high speed, low-power D-type flip-
flop featuring separate D-type inputs organized into dual 9-
bit bytes with byte-oriented clock and output enable control
signals. This device is compliant with IEEE 1149.1 Stan-
dard Test Access Port and BOUNDARY-SCAN Architec-
ture with the incorporation of the defined BOUNDARY-
SCAN test logic and test access port consisting of Test
Data Input (TDI), Test Data Out (TDO), Test Mode Select
(TMS), and Test Clock (TCK).
Features
s IEEE 1149.1 (JTAG) Compliant
s Buffered positive edge-triggered clock
s 3-STATE outputs for bus-oriented applications
s 9-bit data busses for parity applications
s Reduced-swing outputs source 32 mA/sink 64 mA
s Guaranteed to drive 50Ω transmission line to TTL input
levels of 0.8V and 2.0V
s TTL compatible inputs
s 25 mil pitch SSOP (Shrink Small Outline Package)
s Includes CLAMP and HIGHZ instructions
s Member of Fairchild’s SCAN Products
Ordering Code:
Order Number Package Number
Package Description
SCAN18374TSSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
AI_(0–8), BI_(0–8)
ACP, BCP
AOE₁, BOE₁
AO_(0–8), BO_(0–8)
Description
Data Inputs
Clock Pulse Inputs
3-STATE Output Enable Inputs
3-STATE Outputs
Truth Tables
ACP
^X
Inputs
AOE₁
H
L
L
AI_(0–8)
X
L
H
AO_(0–8)
Z
L
H
Inputs
BCP
BOE₁
^X
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= L-to-H Transition
BI_(0–8)
X
L
H
BO_(0–8)
Z
L
H
© 2000 Fairchild Semiconductor Corporation DS010963
www.fairchildsemi.com