NDT410EL Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – N-Channel Logic Level Enhancement Mode Field Effect Transistor

August 1996
NDT410EL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Power SOT N-Channel logic level enhancement mode
power field effect transistors are produced using
Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is especially
tailored to minimize on-state resistance, provide superior
switching performance, and withstand high energy pulses
in the avalanche and commutation modes. These devices
are particularly suited for low voltage applications such as
automotive, DC/DC converters, PWM motor controls, and
other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are needed.
Features
2.1A 100V. R_DS(ON) = 0.25Ω @ V_GS = 5V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
D
D
G
D
S
ABSOLUTE MAXIMUM RATINGS T_A = 25°C unless otherwise noted
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
P_D
Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
Thermal Resistance, Junction-to-Ambient
R_θJC
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
G
S
NDT410EL
100
20
2.1
10
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
NDT410EL Rev. B1