NDT3055 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – N-Channel Enhancement Mode Field Effect Transistor

May 1998
NDT3055
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as DC motor control and
DC/DC conversion where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
4 A, 60 V. R_DS(ON) = 0.100 Ω @ V_GS = 10 V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
SuperSOT^TM-3
SuperSOT^TM-6
SuperSOT^TM-8
SO-8
SOT-223
SOIC-16
D
D
D
D
S
S
D
G
SOT-223
G
D
S
G
SOT-223*
G
(J23Z)
Absolute Maximum Ratings T_A = 25^oC unless otherwise noted
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage - Continuous
I_D
Maximum Drain Current - Continuous (Note 1a)
- Pulsed
P_D
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
Thermal Resistance, Junction-to-Ambient
R_θJC
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
(Note 1a)
(Note 1)
NDT3055
60
±20
4
25
3
1.3
1.1
-65 to 150
42
12
© 1998 Fairchild Semiconductor Corporation
S
Units
V
V
A
W
°C
°C/W
°C/W
NDT3055 Rev.B