NDT014L Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – N-Channel Logic Level Enhancement Mode Field Effect Transistor

NDT014L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
August 1996
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology.This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation
modes.Thesedevices are particularly suited for low voltage
applications such as DC motor control and DC/DC
conversion where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
2.8 A, 60 V. R_DS(ON) = 0.2 Ω @ V_GS = 4.5 V
R_DS(ON) = 0.16 Ω @ V_GS = 10 V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
_________________________________________________________________________________
D
D
G
D
S
Absolute Maximum Ratings T_A = 25°C unless otherwise noted
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
(Note 1a)
P_D
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
G
S
NDT014L
60
± 20
± 2.8
± 10
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDT014L Rev.D