NDS9956A Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Dual N-Channel Enhancement Mode Field Effect Transistor

NDS9956A
Dual N-Channel Enhancement Mode Field Effect Transistor
February 1996
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as DC/DC conversion and DC motor
control where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
3.7A, 30V. R_DS(ON) = 0.08Ω @ V_GS = 10V
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
5
4
6
3
7
2
8
1
Absolute Maximum Ratings
Symbol Parameter
T_A= 25°C unless otherwise noted
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
(Note 1a)
P_D
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9956A
30
± 20
± 3.7
± 15
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS9956A.SAM