NDS9948 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Dual P-Channel Enhancement Mode Field Effect Transistor

February 1996
NDS9948
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
-2.3A, -60V. R_DS(ON) = 0.25Ω @ V_GS = -10V.
High density cell design for low R_DS(ON).
High power and current handling capability in a widely
used surface mount package.
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
Dual MOSFET in surface mount package.
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
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5
6
7
8
Absolute Maximum Ratings
Symbol Parameter
T_A = 25°C unless otherwise noted
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current
- Continuous T_A = 25°C (Note 1a)
- Pulsed
T_A = 25°C
- Continuous T_A = 70°C (Note 1a)
P_D
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
NDS9948
-60
± 20
± 2.3
± 10
± 1.8
2
1.6
1
0.9
-55 to 150
78
40
© 1997 Fairchild Semiconductor Corporation
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
NDS9948.SAM