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NDS9435A Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Single P-Channel Enhancement Mode Field Effect Transistor
May 1996
NDS9435A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited
for low voltage applications such as notebook computer
power management and other battery powered circuits
where fast switching, low in-line power loss, and resistance
to transients are needed.
Features
-5.3A, -30V. RDS(ON) = 0.05Ω @ VGS = -10V
RDS(ON) = 0.07Ω @ VGS = -6V
RDS(ON) = 0.09Ω @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
____________________________________________________________________________________________
D
D
D
D
SO-8
pin 1
S
G
S
S
5
4
6
3
7
2
8
1
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
- Pulsed
(Note 1a)
PD
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case (Note 1)
© 1999 Fairchild Semiconductor Corporation
NDS9435A
-30
± 20
± 5.3
± 20
2.5
1.2
1
-55 to 150
50
25
Units
V
V
A
W
°C
°C/W
°C/W
NDS9435A Rev B