NDS9430A Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Single P-Channel Enhancement Mode Field Effect Transistor

December 1997
NDS9430A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using National's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
-5.3A, -20V. R_DS(ON) = 0.05Ω @ V_GS = -10V
R_DS(ON) = 0.065Ω @ V_GS = -6V
R_DS(ON) = 0.09Ω @ V_GS = -4.5V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
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5
4
6
3
7
2
8
1
Absolute Maximum Ratings T_A = 25°C unless otherwise noted
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
(Note 1a)
P_D
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9430A
-20
± 20
± 5.3
± 20
2.5
1.2
1
-55 to 150
50
25
Units
V
V
A
W
°C
°C/W
°C/W
NDS9430A Rev.A