NDS8934 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – Dual P-Channel Enhancement Mode Field Effect Transistor

March 1996
NDS8934
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly
suited for low voltage applications such as notebook
computer power management and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
-3.8A, -20V. R_DS(ON) = 0.07Ω @ V_GS = -4.5V
R_DS(ON) = 0.1Ω @ V_GS = -2.7V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
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5
4
6
3
7
2
8
1
Absolute Maximum Ratings T_A = 25°C unless otherwise noted
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
(Note 1a)
P_D
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8934
-20
-8
-3.8
-15
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS8934.SAM