NDS8926 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Dual N-Channel Enhancement Mode Field Effect Transistor

July 1996
NDS8926
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as DC motor control
and DC/DC conversion where fast switching, low in-line power
loss, and resistance to transients are needed.
5.5 A, 20 V. R_DS(ON) = 0.035 Ω @ V_GS = 4.5 V
R_DS(ON) = 0.045 Ω @ V_GS = 2.7 V.
High density cell design for extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
___________________________________________________________________________________________
5
4
6
3
7
2
8
1
Absolute Maximum Ratings T_A = 25°C unless otherwise note
Symbol Parameter
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
(Note 1a)
P_D
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note1b)
(Note1c)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8926
20
8
5.5
20
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS8926 Rev. D2