NDS8852H Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – Complementary MOSFET Half Bridge

February 1996
NDS8852H
Complementary MOSFET Half Bridge
General Description
These Complementary MOSFET half bridge devices are
produced using Fairchild's proprietary, high cell density,
DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage half bridge
applications or CMOS applications when both gates are
connected together.
Features
N-Channel 4.3A, 30V, R_DS(ON)=0.08Ω @ V_GS=10V.
P-Channel -3.4A, -30V, R_DS(ON)=0.13Ω @ V_GS=-10V.
High density cell design or extremely low R_DS(ON).
High power and current handling capability in a widely used
surface mount package.
Matched pair for equal input capacitance and power capability
.
________________________________________________________________________________
P-Gate
N -Gate
V+
Vout
Vout
Vout
Vout
V-
Absolute Maximum Ratings
Symbol Parameter
T_A= 25°C unless otherwise noted
N-Channel
V_DSS
Drain-Source Voltage
V_GSS
Gate-Source Voltage
I_D
Drain Current - Continuous
- Pulsed
30
20
(Note 1a & 2)
4.3
15
P_D
Maximum Power Dissipation
(Single Device)
(Note 1a)
(Note 1b)
T_J,T_STG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
R_θJA
R_θJC
Thermal Resistance, Junction-to-Ambient
(Single Device)
Thermal Resistance, Junction-to-Case
(Single Device)
(Note 1a)
(Note 1)
2.5
1.2
1
-55 to 150
50
25
P-Channel
-30
-20
-3.4
-10
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8852H Rev. C1