NDP708A Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – N-Channel Enhancement Mode Field Effect Transistor

May 1994
NDP708A / NDP708AE / NDP708B / NDP708BE
NDB708A / NDB708AE / NDB708B / NDB708BE
N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These N-channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been especially
tailored to minimize on-state resistance, provide
superior switching performance, and withstand high
energy pulses in the avalanche and commutation
modes. These devices are particularly suited for low
voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery
powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
60 and 54A, 80V. R_DS(ON) = 0.022 and 0.025Ω.
Critical DC electrical parameters specified at
elevated temperature.
Rugged internal source-drain diode can eliminate
the need for an external Zener diode transient
suppressor.
175°C maximum junction temperature rating.
High density cell design (3 million/in²) for extremely
low R_DS(ON).
TO-220 and TO-263 (D²PAK) package for both
through hole and surface mount applications.
_____________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
T_C = 25°C unless otherwise noted
NDP708A NDP708AE
NDB708A NDB708AE
NDP708B NDP708BE
NDB708B NDB708BE
V_DSS
Drain-Source Voltage
V_DGR
Drain-Gate Voltage (R_GS < 1 MΩ)
V_GSS
Gate-Source Voltage - Continuous
- Nonrepetitive (t_P < 50 µs)
I_D
Drain Current - Continuous
- Pulsed
80
80
±20
±40
60
54
180
162
P_D
Total Power Dissipation @ T_C = 25°C
150
Derate above 25°C
1
T_J,T_STG
T_L
Operating and Storage Temperature Range
Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
-65 to 175
275
Units
V
V
V
V
A
A
W
W/°C
°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP708.SAM