NC7SP74_05 Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – TinyLogic ULP D-Type Flip-Flop with Preset and Clear

January 2003
Revised January 2005
NC7SP74
TinyLogic ULP D-Type Flip-Flop with Preset and Clear
General Description
The NC7SP74 is a single D-type CMOS Flip-Flop with pre-
set and clear from Fairchild’s Ultra Low Power (ULP)
Series of TinyLogic. Ideal for applications where battery
life is critical, this product is designed for ultra low power
consumption within the V_CC operating range of 0.9V to
3.6V.
The internal circuit is composed of a minimum of inverter
stages including the output buffer, to enable ultra low static
and dynamic power.
The NC7SP74, for lower drive requirements, is uniquely
designed for optimized power and speed, and is fabricated
with an advanced CMOS technology to achieve best in
class speed operation while maintaining extremely low
CMOS power dissipation.
The signal level applied to the D input is transferred to the
Q output during the positive going transition of the CLK
pulse.
Features
s Space saving US8 surface mount package
s MicroPak Pb-Free leadless package
s 0.9V to 3.6V V_CC supply operation
s 3.6V overvoltage tolerant I/Os at V_CC from 0.9V to 3.6V
s t_PD
3.0 ns typ for 3.0V to 3.6V V_CC
4.0 ns typ for 2.3V to 2.7V V_CC
5.0 ns typ for 1.65V to 1.95V V_CC
6.0 ns typ for 1.40V to 1.60V V_CC
9.0 ns typ for 1.10V to 1.30V V_CC
24.0 ns typ for 0.90V V_CC
s Power-Off high impedance inputs and outputs
s Static Drive (I_OH/I_OL)
±2.6 mA @ 3.00V V_CC
±2.1 mA @ 2.30V V_CC
±1.5 mA @ 1.65V V_CC
±1.0 mA @ 1.40V V_CC
±0.5 mA @ 1.10V V_CC
±20 µA @ 0.9V V_CC
s Uses patented Quiet Series noise/EMI reduction
circuitry
s Ultra low dynamic power
Ordering Code:
Product
Order Package Code
Number Number Top Mark
NC7SP74K8X MAB08A
P74
NC7SP74L8X MAC08A
X9
Pb-Free package per JEDEC J-STD-020B.
Package Description
Supplied As
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Battery Life vs. V_CC Supply Voltage
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life = (V_battery *I_battery*.9)/(P_device)/24hrs/day
Where, P_device = (I_CC * V_CC) + (C_PD + C_L) * V_CC2 * f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and
derated 90% and device frequency at 10MHz, with C_L = 15 pF load
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak and Quiet Series are trademarks of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500820
www.fairchildsemi.com