ML4812 Datasheet, PDF (1/16 Pages) Fairchild Semiconductor – Power Factor Controller

April 1998
GENERAL DESCRIPTION
The ML4812 is designed to optimally facilitate a peak
current control boost type power factor correction system.
Special care has been taken in the design of the ML4812
to increase system noise immunity. The circuit includes a
precision reference, gain modulator, error amplifier, over-
voltage protection, ramp compensation, as well as a high
current output. In addition, start-up is simplified by an
under-voltage lockout circuit with 6V hysteresis.
In a typical application, the ML4812 functions as a
current mode regulator. The current which is necessary to
terminate the cycle is a product of the sinusoidal line
voltage times the output of the error amplifier which is
regulating the output DC voltage. Ramp compensation is
programmable with an external resistor, to provide stable
operation when the duty cycle exceeds 50%.
ML4812
Power Factor Controller
FEATURES
s Precision buffered 5V reference (±0.5%)
s Current-input gain modulator reduces external
components and improves noise immunity
s Programmable ramp compensation circuit
s 1A peak current totem-pole output drive
s Overvoltage comparator helps prevent output
voltage “runaway”
s Wide common mode range in current sense
comparators for better noise immunity
s Large oscillator amplitude for better noise immunity
BLOCK DIAGRAM (Pin Configuration Shown is for DIP Version)
OVP
5
+
5V
–
ISENSE
1
+
5V
–
–
GM OUT
2
EA OUT
3
EA–
4
ERROR
+ ^AMP
5V
–
IEA
ISINE
6
GAIN MODULATOR
RAMP COMP
7
CT
16
RT
8
OSC
SQ
RQ
VCC
SHDN
10
OUT
12
PWR GND
11
UNDER
VOLTAGE
LOCKOUT
VREF
14
VCC
13
32V
5V
1kΩ
GND
15
CLOCK
9
REV. 1.0 10/10/2000