ISL9N310AD3 Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – N-Channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs

January 2002
ISL9N310AD3/ISL9N310AD3ST
N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs
General Description
This device employs a new advanced trench MOSFET
technology and features low gate charge while maintaining
low on-resistance.
Optimized for switching applications, this device improves
the overall efficiency of DC/DC converters and allows
operation to higher switching frequencies.
Applications
• DC/DC converters
Features
• Fast switching
• r_DS(ON) = 0.008Ω (Typ), V_GS = 10V
• r_DS(ON) = 0.0115Ω (Typ), V_GS = 4.5V
• Q_g (Typ) = 17nC, V_GS = 5V
• Q_gd (Typ) = 5.4nC
• C_ISS (Typ) = 1800pF
DRAIN (FLANGE)
GATE
SOURCE
TO-252
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
TO-251
D
G
S
MOSFET Maximum Ratings T_A = 25°C unless otherwise noted
Symbol
V_DSS
V_GS
I_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous (T_C = 25^oC, V_GS = 10V)
Continuous (T_C = 100^oC, V_GS = 4.5V)
Continuous (T_C = 25^oC, V_GS = 10V, R_θJA = 52^oC/W)
Pulsed
P_D
Power dissipation
Derate above 25^oC
T_J, T_STG Operating and Storage Temperature
Thermal Characteristics
R_θJC
R _{θ JA}
R _{θ JA}
Thermal Resistance Junction to Case TO-251, TO-252
Thermal Resistance Junction to Ambient TO-251, TO-252
Thermal Resistance Junction to Ambient TO-252, 1in² copper pad area
Package Marking and Ordering Information
Device Marking
N310AD
N310AD
Device
ISL9N310AD3ST
ISL9N310AD3
Package
TO-252AA
TO-251AA
Reel Size
330mm
Tube
Ratings
30
±20
35
35
12
Figure 4
70
0.47
-55 to 175
2.14
100
52
Units
V
V
A
A
A
A
W
W/^oC
o_C
o_C/W
o_C/W
o_C/W
Tape Width
16mm
N/A
Quantity
2500 units
75
©2002 Fairchild Semiconductor Corporation
Rev. B January 2002