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| ISL9N307AD3ST Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – N-Channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs | |||
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February 2002
ISL9N307AD3ST
N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs
General Description
This device employs a new advanced trench MOSFET
technology and features low gate charge while maintaining
low on-resistance.
Optimized for switching applications, this device improves
the overall efficiency of DC/DC converters and allows
operation to higher switching frequencies.
Applications
⢠DC/DC converters
Features
⢠Fast switching
⢠rDS(ON) = 0.006⦠(Typ), VGS = 10V
⢠rDS(ON) = 0.010⦠(Typ), VGS = 4.5V
⢠Qg (Typ) = 28nC, VGS = 5V
⢠Qgd (Typ) = 10nC
⢠CISS (Typ) = 3000pF
DRAIN (FLANGE)
GATE
SOURCE
TO-252
D
G
S
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGS
ID
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous (TC = 25oC, VGS = 10V)
Continuous (TC = 100oC, VGS = 4.5V)
Continuous (TC = 25oC, VGS = 10V, RθJA = 52oC/W)
Pulsed
PD
Power dissipation
Derate above 25oC
Ratings
30
±20
50
50
15
Figure 4
100
0.67
Units
V
V
A
A
A
A
W
W/oC
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance Junction to Case TO-252
Thermal Resistance Junction to Ambient TO-252
Thermal Resistance Junction to Ambient TO-252, 1in2 copper pad area
Package Marking and Ordering Information
Device Marking
N307AD
Device
ISL9N307AD3ST
Package
TO-252AA
Reel Size
330mm
1.36
100
52
Tape Width
16mm
oC/W
oC/W
oC/W
Quantity
2500 units
©2002 Fairchild Semiconductor Corporation
Rev. B, February 2002
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