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ISL9N302AS3ST Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – N-Channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs
April 2002
ISL9N302AS3ST
N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs
General Description
This device employs a new advanced trench MOSFET
technology and features low gate charge while maintaining
low on-resistance.
Optimized for switching applications, this device improves
the overall efficiency of DC/DC converters and allows
operation to higher switching frequencies.
Applications
• DC/DC converters
Features
• Fast switching
• rDS(ON) = 0.0019Ω (Typ), VGS = 10V
• rDS(ON) = 0.0027Ω (Typ), VGS = 4.5V
• Qg (Typ) = 110nC, VGS = 5V
• Qgd (Typ) = 31nC
• CISS (Typ) = 11000pF
DRAIN
(FLANGE)
D
GATE
SOURCE
TO-263AB
G
S
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGS
ID
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous (TC = 25oC, VGS = 10V)
Continuous (TC = 100oC, VGS = 4.5V)
Continuous (TC = 25oC, VGS = 10V, RθJA = 43oC/W)
Pulsed
PD
Power dissipation
Derate above 25oC
TJ, TSTG Operating and Storage Temperature
Ratings
30
±20
75
75
28
Figure 4
345
2.3
-55 to 175
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance Junction to Case TO-263
Thermal Resistance Junction to Ambient TO-263
Thermal Resistance Junction to Ambient TO-263, 1in2 copper pad area
0.43
62
43
Package Marking and Ordering Information
Device Marking
N302AS
Device
ISL9N302AS3ST
Package
TO-263AB
Reel Size
330mm
Tape Width
24mm
Units
V
V
A
A
A
A
W
W/oC
oC
oC/W
oC/W
oC/W
Quantity
800 units
©2002 Fairchild Semiconductor Corporation
Rev. B1,April 2002