FQPF33N10L Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – 100V LOGIC N-Channel MOSFET

FQPF33N10L
100V LOGIC N-Channel MOSFET
September 2000
QFET^TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as high efficiency
switching DC/DC converters, and DC motor control.
Features
• 18A, 100V, R_DS(on) = 0.052Ω @V_GS = 10 V
• Low gate charge ( typical 30 nC)
• Low Crss ( typical 70 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
GD S
TO-220F
FQPF Series
Absolute Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Parameter
Drain-Source Voltage
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (T_C = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R_θJC
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
D
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G!
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S
FQPF33N10L
100
18
12.7
72
± 20
430
18
4.1
6.0
41
0.27
-55 to +175
300
Typ
Max
--
3.7
--
62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A, September 2000