FQD4P40TM Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – P-Channel QFET® MOSFET -400 V, -2.7 A, 3.1 Ω

FQD4P40
P-Channel QFET^® MOSFET
-400 V, -2.7 A, 3.1 Ω
November 2013
Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology. This advanced
technology has been especially tailored to minimize on-
state resistance, provide superior switching performance,
and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for
electronic lamp ballast based on complimentary half
bridge.
Features
• -2.7 A, -400 V, R_DS(on) = 3.1 Ω (Max.) @ V_GS = -10 V,
I_D = -1.35 A
• Low Gate Charge (Typ. 18 nC)
• Low Crss (Typ. 11 pF)
• 100% Avalanche Tested
S
D
G
G
S
D-PAK
D
Absolute Maximum Ratings T_C = 25^oC unless otherwise noted.
Symbol
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Parameter
Drain-Source Voltage
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (T_A = 25°C) *
Power Dissipation (T_C = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQD4P40TM
-400
-2.7
-1.71
-10.8
± 30
260
-2.7
5.0
-4.5
2.5
50
0.4
-55 to +150
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
R_JC
R_JA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max.
Thermal Resistance, Junction to Ambient (*1 in² Pad of 2-oz Copper), Max.
FQD4P40TM
2.5
110
50
Unit
o_C/W
©2000 Fairchild Semiconductor Corporation
1
FQD4P40 Rev. C0
www.fairchildsemi.com