FQD3P20 Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – 200V P-Channel MOSFET

FQD3P20 / FQU3P20
200V P-Channel MOSFET
April 2000
QFET^TM
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters.
Features
• -2.4A, -200V, R_DS(on) = 2.7Ω @V_GS = -10 V
• Low gate charge ( typical 6.0 nC)
• Low Crss ( typical 7.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
S
!
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
Absolute Maximum Ratings

T_C = 25°C unless otherwise noted
Symbol
Parameter
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
- Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (T_A = 25°C) *
Power Dissipation (T_C = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8
from case for 5 seconds
G!








!
D
FQD3P20 / FQU3P20
-200
-2.4
-1.52
-9.6
±
30
150
-2.4
3.7
-5.5
2.5
37
0.29
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
R_θJC
R_θJA
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Typ
Max
Units
--
3.4
°CW
--
50
°CW
--
110
°CW
Rev. A, April 2000