FQD12P10TMF085 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – 100V P-Channel MOSFET

February 2010
FQD12P10TM_F085
tm
100V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• -9.4A, -100V, R_DS(on) = 0.29Ω @V_GS = -10 V
• Low gate charge ( typical 21 nC)
• Low Crss ( typical 65 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• Qualified to AEC Q101
• RoHS Compliant
D
D
G S D-PAK
Absolute Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Parameter
Drain-Source Voltage
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
Power Dissipation (T_A = 25°C) *
Power Dissipation (T_C = 25°C)
- Derate above 25°C
(Note 3)
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8! from case for 5 seconds
Thermal Characteristics
Symbol
R_θJC
R_θJA
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
1
FQD12P10TM_F085 Rev. A
G
S
Ratings
-100
-9.4
-6.0
-37.6
± 30
370
-9.4
5.0
-6.0
2.5
50
0.4
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Typ
Max
Units
--
2.5
°C/W
--
50
°C/W
--
110
°C/W
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