FMPA2151 Datasheet, PDF (1/4 Pages) Fairchild Semiconductor – 2.4-2.5 GHz and 4.9-5.9 GHz Dual Band Linear Power Amplifier Module

PRELIMINARY
August 2006
FMPA2151
2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power
Amplifier Module
Features
■ Dual band operation in a single package design
■ Integrated bias bypass
■ >33dB modulated gain 2.4 to 2.5GHz band
■ >33dB modulated gain 4.9 to 5.9GHz band
■ 3.0% EVM at 19dBm modulated power out (2.4GHz)
■ 3.5% EVM at 19dBm modulated power out (5.5GHz)
■ 3.3V positive supply operation
■ Separate integrated power detectors with 20dB
dynamic range
■ 16 pin 4 x 4 x 1.4mm leadless package
■ Internally matched to 50Ω and DC blocked RF
input/output
■ Optimized for use in 802.11a/b/g applications
General Description
The FMPA2151 is a dual frequency band power amplifier
module designed for high performance WLAN
applications in the 2.4 to 2.5GHz and the 4.90 to 5.9GHz
frequency bands. The 16 pin 4 x 4 x 1.4 mm package with
internal matching on both input and output to 50Ω
minimizes next level PCB space and allows for simplified
integration. Only two external bias bypass capacitors are
required. The two on-chip detectors provide power
sensing capability. The PA’s low power consumption and
excellent linearity are achieved using our InGaP
Heterojunction Bipolar Transistor (HBT) technology.
Complimentary pin out available with part number
FMPA2153 for MIMO applications.
Device (4 x 4 x 1.4mm)
21X5Y1 TT^Z
Electrical Characteristics⁽¹⁾ 802.11g (2.4-2.5 GHz) OFDM Modulation
(with 176 µs burst time, 100 µs idle time) 54 Mbps Data Rate, 16.7 MHz Bandwidth
Parameter
Frequency
Collector Supply Voltage
Mirror Supply Voltage (PA ON 2.4)
Mirror Supply Current (PA ON 2.4)
Gain
Average Packet Current @ +19dBm Pout
EVM @ +19dBm Pout⁽²⁾
Detector Output @ +19dBm Pout
Detector Output @ +7dBm Pout
POUT Spectral Mask Compliance⁽³⁾
Min.
2.4
3.0
2.6
Typ.
3.3
3.0
0.1
31
140
3.0
600
280
+20
Max.
2.5
3.6
3.6
Units
GHz
V
V
mA
dB
mA
%
mV
mV
dBm
Notes:
1. V_CC = 3.3V, PA ON 2.4 = 3.3V, T_A = 25°C, PA is constantly biased, 50Ω system.
2. Percentage includes system noise floor of EVM = 0.8%.
3. Measured at PIN at which Spectral Mask Compliance is satisfied. Two-sample windowing length applied.
©2006 Fairchild Semiconductor Corporation
1
FMPA2151 Rev. D
www.fairchildsemi.com