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FIN1532 Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – 5V LVDS 4-Bit High Speed Differential Receiver
December 2001
Revised December 2001
FIN1532
5V LVDS 4-Bit High Speed Differential Receiver
General Description
This quad receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock and data.
The FIN1532 can be paired with its companion driver, the
FIN1531, or any other LVDS driver.
Features
s Greater than 400Mbs data rate
s 5V power supply operation
s 0.5 ns maximum differential pulse skew
s 3 ns maximum propagation delay
s Low power dissipation
s Power-Off protection for inputs and outputs
s Fail safe protection for open-circuit, shorted and termi-
nated receiver inputs
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Pin compatible with equivalent RS-422
and PECL devices
s 16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number Package Number
Package Description
FIN1532M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1532MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Connection Diagram
Pin Name
Description
ROUT1, ROUT2, ROUT3, ROUT4 LVTTL Data Outputs
RIN1+, RIN2+, RIN3+, RIN4+ Non-inverting LVDS Inputs
RIN1−, RIN2−, RIN3−, RIN4− Inverting LVDS Inputs
EN
Driver Enable Pin
EN
VCC
GND
Inverting Driver Enable Pin
Power Supply
Ground
Function Table
Input
Outputs
EN
EN
RIN+
RIN+
ROUT
H
X
H
L
H
H
X
L
H
L
H
X
Fail Safe Condition
H
X
L
H
L
H
X
L
L
H
L
X
L
Fail Safe Condition
H
L
H
X
Z
H = HIGH Logic Level L = LOW Logic Level X = Don’t Care
Z = High Impedance Fail Safe = Open, Shorted, Terminated
Top View
© 2001 Fairchild Semiconductor Corporation DS500504
www.fairchildsemi.com