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FDS8934A Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Dual P-Channel Enhancement Mode Field Effect Transistor
May 1998
FDS8934A
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
-4 A , -20 V, RDS(ON) = 0.055 Ω @ VGS = -4.5 V,
RDS(ON) = 0.072 Ω @ VGS = -2.5 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
D2
D2
D1
D1
F8D9S34A
SO-8
G2
S2
pin 1
G1
S1
SO-8
SOT-223
5
6
7
8
Absolute Maximum Ratings TA = 25oC unless otherwise noted
Symbol Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
- Pulsed
(Note 1a)
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC
Thermal Resistance, Junction-to-Case (Note 1)
© 1998 Fairchild Semiconductor Corporation
FDS8934A
-20
-8
-4
-20
2
1.6
1
0.9
-55 to 150
78
40
SOIC-16
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
FDS8934A Rev.B