FDS6912_0007 Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET

July 2000
FDS6912
Dual N-Channel Logic Level PWM Optimized PowerTrench^ MOSFET
General Description
These N-Channel Logic Level MOSFETs have been
designed specifically to improve the overall efficiency of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
Features
• 6 A, 30 V.
RDS(ON) = 0.028 Ω @ VGS = 10 V
RDS(ON) = 0.042 Ω @ VGS = 4.5 V.
• Optimized for use in switching DC/DC converters
with PWM controllers
• Very fast switching.
• Low gate charge
D1
D1
D2
D2
SO-8
G1
S1
G2
S2
Absolute Maximum Ratings TA=25^oC unless otherwise noted
Symbol
VDSS
VGSS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
TJ, Tstg
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6912
FDS6912
13’’
5
6
Q1
7
Q2
8
Ratings
30
±25
6
20
2
1.6
1
0.9
-55 to +150
78
40
Tape width
12mm
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500 units
2000 Fairchild Semiconductor Corporation
FDS6912 Rev F (W)