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FDP6030L Datasheet, PDF (1/4 Pages) Fairchild Semiconductor – N-Channel Logic Level Enhancement Mode Field Effect Transistor
April 1998
FDP6030L / FDB6030L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. These devices are particularly suited
for low voltage applications such as DC/DC converters and
high efficiency switching circuits where fast switching, low
in-line power loss, and resistance to transients are needed.
Features
52
A,
30
V.
RDS(ON)
RDS(ON)
=
=
00..0012305ΩΩ@@VVGSG=S=41.50VV.
Improved replacement for NDP6030L/NDB6030L.
Low gate charge (typical 34 nC).
Low Crss (typical 175 pF).
Fast switching speed.
_________________________________________________________________________________
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise note
Symbol Parameter
FDP6030L
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage - Continuous
ID
Drain Current - Continuous
- Pulsed
PD
Maximum Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient
30
±20
52
156
75
0.5
-65 to 175
FDB6030L
2
62.5
© 1998 Fairchild Semiconductor Corporation
Units
V
V
A
W
W/°C
°C
°C/W
°C/W
FDP6030L Rev.C1