FDP20N50 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – 500V N-Channel MOSFET

FDP20N50
500V N-Channel MOSFET
Features
• 20A, 500V, R_DS(on) = 0.23Ω @V_GS = 10 V
• Low gate charge ( typical 45.6 nC)
• Low C_rss ( typical 27 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
May 2006
UniFET^TM
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switched mode power supplies and active power factor
correction.
D
GDS
TO-220
FDP Series
Absolute Maximum Ratings
Symbol
Parameter
V_DSS
I_D
I_DM
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
- Pulsed
(Note 1)
V_GSS
E_AS
I_AR
E_AR
dv/dt
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 2)
(Note 1)
(Note 1)
(Note 3)
P_D
Power Dissipation (T_C = 25°C)
- Derate above 25°C
T_J, T_STG
T_L
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
* Drain current limited by maximum junction termperature.
Thermal Characteristics
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
©2006 Fairchild Semiconductor Corporation
1
FDP20N50 Rev. A1
G
S
FDP20N50
500
20
12.9
80
± 30
1110
20
25.0
4.5
250
2.0
-55 to +150
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Min.
--
0.5
--
Max.
0.5
--
62.5
Unit
°C/W
°C/W
°C/W
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