FDP18N50 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – 500V N-Channel MOSFET

FDP18N50 / FDPF18N50
500V N-Channel MOSFET
Features
• 18A, 500V, R_DS(on) = 0.265Ω @V_GS = 10 V
• Low gate charge ( typical 45 nC)
• Low C_rss ( typical 25 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
October 2006
UniFET^TM
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
D
GDS
TO-220
FDP Series
GD S
TO-220F
FDPF Series
G
S
Absolute Maximum Ratings
Symbol
Parameter
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
- Pulsed
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
P_D
Power Dissipation (T_C = 25°C)
- Derate above 25°C
T_J, T_STG
Operating and Storage Temperature Range
T_L
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
FDP18N50 FDPF18N50
500
8
108
8 *
108

72
72

±30
945
18
23
4.5
235
58
1.88
0.47
-55 to +150
300
FDP18N50
0.53
0.5
62.5
FDPF18N50
2.15
--
62.5
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2006 Fairchild Semiconductor Corporation
1
FDP18N50 / FDPF18N50 Rev. A
www.fairchildsemi.com