FDP13N50F Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – N-Channel MOSFET 500V, 12A, 0.54Ω

FDP13N50F / FDPF13N50FT
N-Channel MOSFET
500V, 12A, 0.54Ω
Features
• R_DS(on) = 0.42Ω ( Typ.)@ V_GS = 10V, I_D = 6A
• Low gate charge ( Typ. 30nC)
• Low C_rss ( Typ. 14.5pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS compliant
September 2007
UniFET^TM
tm
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
D
G DS
TO-220
FDP Series
GD S
G
TO-220F
FDPF Series
S
MOSFET Maximum Ratings T_C = 25^oC unless otherwise noted*
Symbol
V_DSS
V_GSS
I_D
I_DM
E_AS
I_AR
E_AR
dv/dt
P_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
-Continuous (T_C = 25^oC)
-Continuous (T_C = 100^oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(T_C = 25^oC)
- Derate above 25^oC
T_J, T_STG
T_L
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
Thermal Characteristics
FDP13N50F FDPF13N50FT
500
±30
12
12*
7.2
7.2*
(Note 1)
48
48*
(Note 2)
684
(Note 1)
12
(Note 1)
19.5
(Note 3)
4.5
195
42
1.53
0.33
-55 to +150
300
Units
V
V
A
A
mJ
A
mJ
V/ns
W
W/^oC
o_C
o_C
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Case to Sink Typ.
Thermal Resistance, Junction to Ambient
FDP13N50F FDPF13N50FT
0.65
3.0
0.5
-
62.5
62.5
Units
o_C/W
©2007 Fairchild Semiconductor Corporation
1
FDP13N50F / FDPF13N50FT Rev. A
www.fairchildsemi.com