FDP12N50F Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – N-Channel MOSFET 500V, 11.5A, 0.7Ω

FDP12N50F / FDPF12N50FT
N-Channel MOSFET
500V, 11.5A, 0.7Ω
Features
• R_DS(on) = 0.59Ω ( Typ.)@ V_GS = 10V, I_D = 6A
• Low gate charge ( Typ. 21nC)
• Low C_rss ( Typ. 11pF)
• Fast switching
• 100% avalanche tested
• Improve dv/dt capability
• RoHS compliant
December 2007
UniFET^TM
tm
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advance technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switching mode power supplies and active power factor
correction.
D
G
GDS
TO-220
FDP Series
GD S
TO-220F
FDPF Series
S
MOSFET Maximum Ratings T_C = 25^oC unless otherwise noted
Symbol
V_DSS
V_GSS
I_D
I_DM
E_AS
I_AR
E_AR
dv/dt
P_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
-Continuous (T_C = 25^oC)
-Continuous (T_C = 100^oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(T_C = 25^oC)
- Derate above 25^oC
T_J, T_STG
Operating and Storage Temperature Range
T_L
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
Thermal Characteristics
FDP12N50F FDPF12N50FT
500
±30
11.5
11.5*
6.9
6.9*
(Note 1)
46
46*
(Note 2)
456
(Note 1)
11.5
(Note 1)
16.5
(Note 3)
4.5
165
42
1.33
0.33
-55 to +150
300
Units
V
V
A
A
mJ
A
mJ
V/ns
W
W/^oC
o_C
o_C
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Case to Sink Typ.
Thermal Resistance, Junction to Ambient
FDP12N50F FDPF12N50FT
0.75
3.0
0.5
-
62.5
62.5
Units
o_C/W
©2007 Fairchild Semiconductor Corporation
1
FDP12N50F / FDPF12N50FT Rev. A1
www.fairchildsemi.com