FDMC510P Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – P-Channel PowerTrench MOSFET

FDMC510P
P-Channel PowerTrench^® MOSFET
-20 V, -18 A, 8.0 mΩ
Features
„ Max r_DS(on) = 8.0 mΩ at V_GS = -4.5 V, I_D = -12 A
„ Max r_DS(on) = 9.8 mΩ at V_GS = -2.5 V, I_D = -10 A
„ Max r_DS(on) = 13 mΩ at V_GS = -1.8 V, I_D = -9.3 A
„ Max r_DS(on) = 17 mΩ at V_GS = -1.5 V, I_D = -8.3 A
„ High performance trench technology for extremely low r_DS(on)
„ High power and current handling capability in a widely used
surface mount package
„ 100% UIL Tested
„ Termination is Lead-free and RoHS Compliant
„ HBM ESD capability level >2 KV typical (Note 4)
June 2010
General Description
This P-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced Power Trench^® process that has
been optimized for r_DS(ON), switching performance and
ruggedness.
Applications
„ Battery Management
„ Load Switch
Top
Bottom
Pin 1
S ^SG
S
DD
D
D
MLP 3.3x3.3
MOSFET Maximum Ratings T_A = 25 °C unless otherwise noted
Symbol
V_DS
V_GS
I_D
E_AS
P_D
T_J, T_STG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
T_C = 25 °C
T_C = 25 °C
T_A = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
T_C = 25 °C
Power Dissipation
T_A = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
Ratings
-20
±8
-18
-54
-12
-50
37
41
2.3
-55 to +150
Units
V
V
A
mJ
W
°C
R_θJC
R_θJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
3
(Note 1a)
53
°C/W
Device Marking
FDMC510P
Device
FDMC510P
Package
MLP 3.3X3.3
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2010 Fairchild Semiconductor Corporation
1
FDMC510P Rev.C5
www.fairchildsemi.com