FDG313N Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Digital FET, N-Channel

July 2000
FDG313N
Digital FET, N-Channel
General Description
This N-Channel enhancement mode field effect
transistor is produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance. This device has been designed especially
for low voltage applications as a replacement for
bipolar digital transistor and small signal MOSFET.
Applications
• Load switch
• Battery protection
• Power management
Features
• 0.95 A, 25 V. R_DS(on) = 0.45 Ω @ V_GS = 4.5 V
R_DS(on) = 0.60 Ω @ V_GS = 2.7 V.
• Low gate charge (1.64 nC typical)
• Very low level gate drive requirements allowing direct
operation in 3V circuits (V_GS(th) < 1.5V).
• Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
• Compact industry standard SC70-6 surface mount
package.
S
D
1
D
2
G
pin 1
SC70-6
D
D
3
Absolute Maximum Ratings ^TA ^{= 25°C unless otherwise noted}
Symbol
Parameter
V_DSS
V_GSS
I_D
P_D
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
T_J, T_stg
ESD
Operating and Storage Junction Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
6
5
4
FDG313N
25
±⁸
0.95
2
0.75
0.55
0.48
-55 to +150
6
Thermal Characteristics
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
260
Package Outlines and Ordering Information
Device Marking
Device
Reel Size
.13
FDG313N
7’’
Tape Width
8mm
1998 Fairchild Semiconductor Corporation
Units
V
V
A
W
°^C
kV
°^C/W
Quantity
3000 units
FDG313N Rev. C