FDG1024NZ Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Dual N-Channel PowerTrench® MOSFET 20 V, 1.2 A, 175 mΩ

August 2009
FDG1024NZ
Dual N-Channel PowerTrench^® MOSFET
20 V, 1.2 A, 175 mΩ
Features
„ Max r_DS(on) = 175 mΩ at V_GS = 4.5 V, I_D = 1.2 A
„ Max r_DS(on) = 215 mΩ at V_GS = 2.5 V, I_D = 1.0 A
„ Max r_DS(on) = 270 mΩ at V_GS = 1.8 V, I_D = 0.9 A
„ Max r_DS(on) = 389 mΩ at V_GS = 1.5 V, I_D = 0.8 A
„ HBM ESD protection level >2 kV (Note 3)
„ Very low level gate drive requirements allowing operation in
3 V circuits (V_GS(th) < 1.5 V)
„ Very small package outline SC70-6
„ RoHS Compliant
General Description
This dual N-Channel logic level enhancement mode field effect
transistors are produced using Fairchild’s proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This device
has been designed especially for low voltage applications as a
replacement for bipolar digital transistors and small signal
MOSFETs. Since bias resistors are not required, this dual digital
FET can replace several different digital transistors, with
different bias resistor values.
S2
G2
D1
D2
G1
S1
S1 ₁
G1 2
D2 3
6 _D1
5 G2
4 S2
SC70-6
MOSFET Maximum Ratings T_A = 25 °C unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
T_J, T_STG
Parameter
Drain to Source Voltage
Gate to Source Voltage
-Continuous
-Pulsed
T_A = 25°C
Power Dissipation
T_A = 25°C
Power Dissipation
T_A = 25°C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
20
±8
1.2
6
0.36
0.30
-55 to +150
Units
V
V
A
W
°C
R_θJA
R_θJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
350
(Note 1b)
415
°C/W
Device Marking
.24
Device
FDG1024NZ
Package
SC70-6
Reel Size
7”
Tape Width
8 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
1
FDG1024NZ Rev.B
www.fairchildsemi.com