FDFMA3N109 Datasheet, PDF (1/7 Pages) Fairchild Semiconductor – Integrated N-Channel PowerTrench MOSFET and Schottky Diode

May 2006
FDFMA3N109
Integrated N-Channel PowerTrench^® MOSFET and Schottky Diode
General Description
This device is designed specifically as a single package
solution for a boost topology in cellular handset and
other ultra-portable applications. It features a MOSFET
with low input capacitance, total gate charge and on-
state resistance, and an independently connected
schottky diode with low forward voltage and reverse
leakage current to maximize boost efficiency.
The MicroFET 2x2 package offers exceptional thermal
performance for its physical size and is well suited to
switching and linear mode applications.
PIN 1
A NC D
K
D
Features
MOSFET:
• 2.9 A, 30 V R_DS(ON) = 123 mΩ @ V_GS = 4.5 V
R_DS(ON) = 140 mΩ @ V_GS = 3.0 V
R_DS(ON) = 163 mΩ @ V_GS = 2.5 V
Schottky:
• V_F < 0.46 V @ 500mA
• Low profile – 0.8 mm maximum – in the new package
MicroFET 2x2 mm
• RoHS Compliant
A1
NC 2
6K
5G
KGS
MicroFET 2x2
D3
4S
Absolute Maximum Ratings T_A=25^oC unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
T_J, T_STG
V_RRM
I_O
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous (T_C = 25°C, V_GS = 4.5V)
– Continuous (T_C = 25°C, V_GS = 2.5V)
– Pulsed
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Temperature
Schottky Repetitive Peak Reverse Voltage
Schottky Average Forward Current
(Note 1a)
(Note 1b)
Ratings
30
±12
2.9
2.7
10
1.5
0.65
–55 to +150
28
1
Thermal Characteristics
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
83
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1b)
193
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
101
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1d)
228
Package Marking and Ordering Information
Device Marking
Device
Reel Size
109
FDFMA3N109
7’’
Tape width
8mm
Units
V
V
A
W
°C
V
A
°C/W
Quantity
3000 units
©2006 Fairchild Semiconductor Corporation
FDFMA3N109 Rev B(W)