FDD86113LZ Datasheet, PDF (1/6 Pages) Fairchild Semiconductor – N-Channel Shielded Gate PowerTrench® MOSFET 100 V, 5.5 A, 104 mΩ

June 2013
FDD86113LZ
N-Channel Shielded Gate PowerTrench^® MOSFET
100 V, 5.5 A, 104 mΩ
Features
General Description
„ Shielded Gate MOSFET Technology
„ Max r_DS(on) = 104 mΩ at V_GS = 10 V, I_D = 4.2 A
„ Max r_DS(on) = 156 mΩ at V_GS = 4.5 V, I_D = 3.4 A
„ HBM ESD protection level > 6 kV typical (Note 4)
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced PowerTrench^® process
that incorporates Shielded Gate technology. This process has
been optimized for the on-state resistance and yet maintain
superior switching performance. G-S zener has been added to
enhance ESD voltage level.
„ High performance trench technology for extremely low rDS(on)
„ High power and current handling capability in a widely used
surface mount package
Application
„ DC-DC conversion
„ 100% UIL Tested
„ RoHS Compliant
G
S
D
D_{T O}-P_-2A₅K₂
(T O -25 2)
D
G
S
MOSFET Maximum Ratings T_C = 25 °C unless otherwise noted
Symbol
V_DS
V_GS
I_D
E_AS
P_D
T_J, T_STG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
T_C = 25 °C
TA = 25 °C
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation
T_C = 25 °C
Power Dissipation
T_A = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
100
±20
5.5
4.2
15
12
29
3.1
-55 to +150
Units
V
V
A
mJ
W
°C
R_θJC
R_θJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
4.3
(Note 1a)
96
°C/W
Device Marking
FDD86113LZ
Device
FDD86113LZ
Package
D-PAK(TO-252)
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
©2011 Fairchild Semiconductor Corporation
1
FDD86113LZ Rev. C1
www.fairchildsemi.com