FDD8426H Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – Dual N & P-Channel PowerTrench® MOSFET N-Channel: 40 V, 12 A, 12 mΩ P-Channel: -40 V, -10 A, 17 mΩ

FDD8426H
September 2009
Dual N & P-Channel PowerTrench^® MOSFET
N-Channel: 40 V, 12 A, 12 mΩ P-Channel: -40 V, -10 A, 17 mΩ
Features
General Description
Q1: N-Channel
„ Max r_DS(on) = 12 mΩ at V_GS = 10 V, I_D = 12 A
„ Max r_DS(on) = 15 mΩ at V_GS = 4.5 V, I_D = 11 A
Q2: P-Channel
„ Max r_DS(on) = 17 mΩ at V_GS = -10 V, I_D = -10 A
„ Max r_DS(on) = 27 mΩ at V_GS = -4.5 V, I_D = -8.3 A
„ 100% UIL Tested
„ RoHS Compliant
These dual N and P-Channel enhancement mode Power
MOSFETs are produced using Fairchild Semiconductor’s
advanced PowerTrench^® process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
Applications
„ Inverter
„ H-Bridge
D1/D2
D1
D2
G2
S2
G1
S1
Dual DPAK 4L
G1
G2
S1
N-Channel
S2
P-Channel
MOSFET Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous (Package Limited)
- Continuous (Silicon Limited)
- Continuous
- Pulsed
Power Dissipation for Single Operation
E_AS
T_J, T_STG
Single Pulse Avalanche Energy
Operating and Storage Junction Temperature Range
Thermal Characteristics
T_C = 25°C
T_A = 25°C
T_C = 25°C
T_A = 25°C
T_A = 25°C
(Note 1)
(Note 1a)
(Note 1b)
(Note 3)
Q1
Q2
40
-40
±20
±20
17
-17
56
-48
12
-10
40
-40
56
65
3.1
1.3
112
162
-55 to +150
Units
V
V
A
W
mJ
°C
R_θJC
Thermal Resistance, Junction to Case, Single Operation for Q1
(Note 1)
1.4
R_θJC
Thermal Resistance, Junction to Case, Single Operation for Q2
(Note 1)
1.4
Package Marking and Ordering Information
°C/W
Device Marking
FDD8426H
Device
FDD8426H
Package
TO-252-4L
Reel Size
13”
Tape Width
12mm
Quantity
2500units
©2009 Fairchild Semiconductor Corporation
1
FDD8426H Rev.C
www.fairchildsemi.com