FDD603AL Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – N-Channel Logic Level Enhancement Mode Field Effect Transistor

July 1999
FDD603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
This N-Channel logic level enhancement mode power
field effect transistor is produced using Fairchild’s
proprietary, high cell density, DMOS technology. This
very high density process is tailored to minimize on-
state resistance. These devices are particularly suited
for low voltage applications such as DC/DC converters
and high efficiency switching circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
Applications
• DC/DC converters
• Motor drives
Features
• 33 A, 30 V. R_DS(ON) = 0.023 Ω @ V_GS = 10 V
R_DS(ON) = 0.037 Ω @ V_GS = 4.5 V.
• Critical DC electrical parameters specified at elevated
temperature.
• Rugged avalanche-rated internal source-drain diode
can eliminate the need for external Zener Diode.
• High density cell design for extremely low R_DS(ON) .
D
D
G
G
S
TO-252
Absolute Maxim um Ratings TC=25^oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, Tstg
Parameter
Drain-Source Voltage
Gate-Source Voltage
Maximum Drain Current - Continuous
(Note 1)
TA = 25°C
Maximum Drain Current -Pulsed
Maximum Power Dissipation @ TC = 25^oC
TA = 25^oC
TA = 25^oC
(Note 1a)
(Note 1)
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
R_θJC
Thermal Resistance, Junction-to-Case
R_θJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
(Note 1a)
(Note 1b)
S
Ratings
30
±20
33
9.5
80
39
3.2
1.3
-55 to +150
2.5
40
96
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDD603AL
FDD603AL
13’’
Tape Width
16mm
1999 Fairchild Semiconductor Corporation
Units
V
V
A
W
°C
°C/W
°C/W
°C/W
Quantity
2500
FDD603AL, Rev. B