FDD5202P Datasheet, PDF (1/5 Pages) Fairchild Semiconductor – P-Channel, Logic Level, MOSFET

February 1999
PRELIMINARY
FDD5202P
P-Channel, Logic Level, MOSFET
General Description
This P-Channel Logic level MOSFET is produced using
Fairchild Semiconductor's advanced process that has
been especially tailored to minimize the on state
resistance and yet maintain low gate charge for superior
switching performance.
Applications
• DC/DC converter
• Motor drives
• L.D.O.
Features
• -8 A, -60 V. R_DS(on) = 0.3 Ω @ V_GS = -10 V
R_DS(on) = 0.5 Ω @ V_GS = -4.5 V.
• Low gate charge (15.5nC typical).
• Fast switching speed.
S
D
G
G
S
TO-252
Absolute Maximum Ratings
TA=25^oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, Tstg
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
(Note 1)
(Note 1a)
- Pulsed
Maximum Power Dissipation @ TC = 25^oC
TA = 25^oC
TA = 25^oC
(Note 1)
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
R_θJC
R_θJA
Thermal Resistance, Junction-to- Case
Thermal Resistance, Junction-to- Ambient
(Note 1)
(Note 1b)
D
Ratings
-60
±20
-8
-2.3
-15
39
2.8
1.3
-55 to +150
3.2
96
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDD5202P
FDD5202P
13’’
©1999 Fairchild Semiconductor Corporation
Tape width
16mm
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500
FDD5202P, Rev. A