FDD3N50NZ Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – N-Channel MOSFET 500V, 2.5A, 2.5

FDD3N50NZ
N-Channel MOSFET
500V, 2.5A, 2.5
Features
• R_DS(on) = 2.1 ( Typ.)@ V_GS = 10V, I_D = 1.25A
• Low Gate Charge ( Typ. 6.2nC)
• Low C_rss ( Typ. 2.5pF)
• Fast Switching
• 100% Avalanche Tested
• Improved dv/dt Capability
• ESD Imoroved Capability
• RoHS Compliant
November 2011
UniFET-II^TM
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advance technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switching mode power supplies and active power factor
correction.
D
G
S
D-PAK
MOSFET Maximum Ratings T_C = 25^oC unless otherwise noted*
Symbol
Parameter
V_DSS
V_GSS
I_D
I_DM
E_AS
I_AR
E_AR
dv/dt
P_D
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
-Continuous (T_C = 25^oC)
-Continuous (T_C = 100^oC)
- Pulsed
(T_C = 25^oC)
- Derate above 25^oC
T_J, T_STG
T_L
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
R_JC
R_JA
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
©2011 Fairchild Semiconductor Corporation
1
FDD3N50NZ Rev. C0
 (Note 1)
(Note 2)
 (Note 1)
 (Note 1)
 (Note 3)
FDD3N50NZ
500
±25
2.5
1.5
10
114
2.5
4
10
40
0.3
-55 to +150
300
Units
V
V
A
A
mJ
A
mJ
V/ns
W
W/^oC
o_C
o_C
Ratings
3.1
90
Units
o_C/W
www.fairchildsemi.com