FDD3510H Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – Dual N & P-Channel PowerTrench MOSFET N-Channel: 80V, 13.9A, 80mOHM P-Channel: -80V, -9.4A, 190mOHM

FDD3510H
April 2008
Dual N & P-Channel PowerTrench^® MOSFET
N-Channel: 80V, 13.9A, 80mΩ P-Channel: -80V, -9.4A, 190mΩ
Features
General Description
Q1: N-Channel
„ Max r_DS(on) = 80mΩ at V_GS = 10V, I_D = 4.3A
„ Max r_DS(on) = 88mΩ at V_GS = 6V, I_D = 4.1A
Q2: P-Channel
„ Max r_DS(on) = 190mΩ at V_GS = -10V, I_D = -2.8A
„ Max r_DS(on) = 224mΩ at V_GS = -4.5V, I_D = -2.6A
„ 100% UIL Tested
„ RoHS Compliant
These dual N and P-Channel enhancement mode Power
MOSFETs are produced using Fairchild Semiconductor’s
advanced PowerTrench^® process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
Applications
„ Inverter
„ H-Bridge
D1/D2
D1
D2
G2
S2
G1
S1
Dual DPAK 4L
G1
G2
S1
N-Channel
S2
P-Channel
MOSFET Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous
- Continuous
- Pulsed
Power Dissipation for Single Operation
E_AS
T_J, T_STG
Single Pulse Avalanche Energy
Operating and Storage Junction Temperature Range
Thermal Characteristics
T_C = 25°C
T_A = 25°C
T_C = 25°C (Note 1)
T_A = 25°C (Note 1a)
T_A = 25°C (Note 1b)
(Note 3)
Q1
Q2
80
-80
±20
±20
13.9
-9.4
4.3
-2.8
20
-10
35
32
3.1
1.3
37
54
-55 to +150
Units
V
V
A
W
mJ
°C
R_θJC
Thermal Resistance, Junction to Case, Single Operation for Q1
(Note 1)
3.5
R_θJC
Thermal Resistance, Junction to Case, Single Operation for Q2
(Note 1)
3.9
Package Marking and Ordering Information
°C/W
Device Marking
FDD3510H
Device
FDD3510H
Package
TO-252-4L
Reel Size
13”
Tape Width
12mm
Quantity
2500 units
©2008 Fairchild Semiconductor Corporation
1
FDD3510H Rev.C
www.fairchildsemi.com